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  • Architecture, Implementation and Design Automation
    Ayan Palchaudhuri; Rajat Subhra Chakraborty
    978-81-322-2520-1
    2016
    Edition 1
    • Describes the optimized implementations of several arithmetic data path, control path and pseudorandom sequence generator circuits
    • Proposed designs outperform and have superior operand-width scalability, compared to implementations based on native DSP hard macros provided by Xilinx or those derived by the traditional Behavioral HDL-to-implementation design flow
    • Proposes a unified framework to design and implement high performance integer arithmetic circuits using 'fabric logic' available on the leading FPGA platforms from Xilinx
    • Provides detailed mathematical analysis aimed at deriving the proposed architectures step-by-step
    • Describes and implements Design automation of the proposed design methodology, which integrates easily into the standard (non-licensed) Xilinx ISE design environment
    • Includes supplementary material: sn.pub/extras

    €180

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