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  • eBook:Parasitic Substrate Coupling in High Voltage Integrated Circuits

    Parasitic Substrate Coupling in High Voltage Integrated Circuits

    Minority and Majority Carriers Propagation in Semiconductor Substrate
    Pietro Buccella; Camillo Stefanucci; Maher Kayal; Jean-Michel Sallese
    978-3-319-74382-0
    2018
    Edition 1
    • Discusses substrate modeling and circuit-level simulation of parasitic bipolar device coupling effects in integrated circuits
    • Includes circuit back-annotation of the parasitic lateral n-p-n and vertical p-n-p bipolar transistors in the substrate
    • Uses Spice for simulation and characterization of parasitic bipolar transistors, latch-up of the parasitic p-n-p-n structure, and electrostatic discharge (ESD) protection devices
    • Offers design guidelines to reduce couplings by adding specific protections

    €180

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