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  • Weitao Li; Fule Li; Zhihua Wang
    978-3-319-62012-1
    2018
    Edition 1
    • Provides an in-depth introduction to the newest design techniques for the power-efficient, high-resolution (not less than 12 bit), and high-speed (not less than 200 MSps) AD converter
    • Presents three types of power-efficient architectures of the high-resolution and high-speed AD converter
    • Discusses the relevant circuit blocks (i.e., the reference voltage buffer, the opamp, and the comparator) in two aspects, relaxing the requirements and improving the performance
    • Includes supplementary material: sn.pub/extras

    €200

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