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  • António Manuel Lourenço Canelas; Jorge Manuel Correia Guilherme; Nuno Cavaco Gomes Horta
    978-3-030-41536-5
    2020
    Edition 1
    • Describes a new yield estimation methodology to reduce the time impact caused by Monte Carlo simulations, enabling its adoption in analog integrated circuits sizing and optimization processes with population-based algorithms
    • Enables designers to reduce the number of redesign iterations, by considering the robustness of solutions at early stages of the analog IC design flow;
    • Includes detailed background on automatic analog IC sizing and optimization

    €180

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