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System-on-Chip Security

Validation and Verification

Farimah Farahmandi; Yuanwen Huang; Prabhat Mishra; Fareena Saqib; Jim Plusquellic

978-3-030-30596-3

2020
Edition 1
- Outlines a wide variety of hardware security threats and vulnerabilities as well as their sources in each of the stages of a design life cycle
- Summarizes unsafe current design practices that lead to security and trust vulnerabilities
- Covers state-of-the-art techniques as well as ongoing research efforts in developing scalable security validation using formal methods including symbolic algebra, model checkers, SAT solvers, and theorem provers
- Explains how to leverage security validation approaches to prevent side-channel attacks
- Presents automated debugging and patching techniques in the presence of security vulnerabilities
- Includes case studies for security validation of arithmetic circuits, controller designs, as well as processor-based SoCs
€160 €144
10% OFF

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