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  • Hans Reyserhove; Wim Dehaene
    978-3-030-12485-4
    2019
    Edition 1
    • Presents a full bottom-up micro-electronics approach: circuit-level, design strategy and CAD automation, architecture optimization
    • Motivates discussion with simulation results and/or measurements in an advanced nanometer CMOS process
    • Compares traditional circuit/design/architecture techniques and state-of-the-art, setting the landscape of current best performance and how it can be improved

    €180

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