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Generating Hardware Assertion Checkers

For Hardware Verification, Emulation, Post-Fabrication Debugging and On-Line Monitoring

Marc Boulé; Zeljko Zilic

978-1-4020-8586-4

2008
Edition 1
- Efficient synthesis of assertion checkers for the main assertion languages (PSL and SVA)
- Applications in verification, emulation, post-fabrication debugging, on-line monitoring, with a unique “under-the-hood” view
- A missing link between the literature on assertion languages and pre-made checker libraries
- Extensive benchmarks and verification of assertion checkers, with examples of real-world circuit checkers
- Comprehensive background on hardware assertion languages, temporal logic and finite automata
€180 €162
10% OFF

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